多端口总线研究

作者: 专业:微电子学与固体电子学 导师:李哲英 年度:2007 学位:硕士  院校: 北京交通大学

关键词
片上系统 片上总线构架 AHB总线 PLB总线

Keywords
System On-a-chip, Bus Architecture On-chip, AHB Bus, PLB Bus
        随着大规模集成电路和半导体工艺的发展,片上系统越来越广泛地被应用到各个领域。在经典的系统设计方法中,从设备与处理器的连接主要是在板级,现在很大一部分都集成到了芯片内部,这样可以避免许多PCB设计的缺点,比如减少系统功耗,达到轻薄化、低价化的目的。但是整个芯片的规模和复杂度日益增大,对芯片设计人员的要求也随之提高,系统设计人员面临了许多新的问题。解决这些问题的关键是必须要有合适的片上总线结构。本文首先介绍了片上总线技术的现状,主要讨论了两种主要的片上总线结构,即ARM公司的AMBA总线和IBM公司的CoreConnect总线。比较了两种总线主要控制信号的作用及基本工作原理。两种总线的总体性能主要由各自的高速片上总线AHB总线和PLB总线决定,因此本文重点对这两种高速片上总线做了全面深入的对比,分析了各自的特点、应用范围和不足之处。在此基础上,以CoreConnect总线构架为基础,针对特定的应用需求,首次提出了针对PLB总线的两种改进方案:一种是简化型的总线构架,其主要特点是在特定传输模式的条件下达到简化操作降低功耗的目的;另一种是在原有总线构架的基础上增加若干状态信号线,主要特点是使从设备具有请求数据操作的功能。最后,本文还探讨了片上总线的发展趋势即标准化、简单化、网络化。
    With the development of VLSI and semiconductor manufacture technics, SoC (Syctem on a Chip) is applied to various fields more and more widely. In the classic system design methods, the connection of slave equipments with processor is mainly in the board level. However, developers can integrate many function units on one chip, then the joint of the slave devices with central processor unit can be also realized on chip. This design method has several advantages, such as avoiding many defects which are indivisible in systems implemented on PCB, lowering the system power cost and can minimizing the scale of system. But the system designers have to face more problems in that the chip scale and complexity is more serious. One of the key points to solve these problems is the architecture of bus on chip.At first, this article introduces current statement about bus on chip. Especially, two kind of bus structure - AMBA bus and CoreConnect bus are mentioned. This thesis expatiates on function of control signals and basic principles. The total performances of two buses are decided by AHB bus and PLB bus.In allusion to different application, this thesis puts forwards two modification scheme for new bus architecture based on CoreConnect, which is a kind of simplified bus architecture. This bus architecture feature is the lower power consumption when datas are transmitted by special mode. Another scheme is to append some state signals to original bus architecture. Its main point is to make the slave terminal have the function of requiring data operation.In the end, this article studies the trend of bus on chip: Standard, Simplification and Network
        

多端口总线研究

中文摘要3-4
ABSTRACT4
1 绪论7-11
    1.1 片上总线特性分析7-9
        1.1.1 SoC 是集成电路必然发展7-8
        1.1.2 片上总线与传统片内总线比较8
        1.1.3 片上总线与板级总线比较8
        1.1.4 片上总线设计要求8-9
    1.2 国内外研究状况9-11
        1.2.1 论文研究内容及意义10-11
2 AMBA 总线结构11-24
    2.1 简介11
    2.2 总线拓扑结构11-12
    2.3 AHB 总线协议12-18
        2.3.1 AHB 主设备12-13
        2.3.2 AHB 从设备13-15
        2.3.3 AHB 总线译码器15-16
        2.3.4 AHB 主设备的传输类型16-17
        2.3.5 AHB 从设备的响应类型17-18
    2.4 AHB 总线的控制方法18-24
        2.4.1 相关信号描述18-19
        2.4.2 AHB 总线基本传输19-22
        2.4.3 AHB 总线请求22
        2.4.4 AHB 总线授予22-23
        2.4.5 AHB 总线锁死23-24
3 AMBA 总线速度分析24-41
    3.1 ARM7TDMI 与ARM9TDMI24-30
        3.1.1 ARM7TDMI24-29
        3.1.2 ARM9TDMI29-30
    3.2 ARM720T 与ARM920T30-33
        3.2.1 ARM720T 处理器核30-32
        3.2.2 ARM920T 处理器核32-33
    3.3 同一总线不同内核的总线分析33-41
        3.3.1 S3C44B0X 和S3C2410X 传输速度比较分析33-39
        3.3.2 AHB 总线的数据传输39-41
4 CORECONNECT 总线结构41-52
    4.1 总线拓扑结构41-43
    4.2 PLB 总线简介43-45
    4.3 PLB 总线传输协议45-51
    4.4 PLB 总线的控制方法51-52
5 AHB 总线与PLB 总线性能分析52-63
    5.1 AHB 总线与PLB 总线的相似点52
    5.2 AHB 总线与PLB 总线主要区别52-59
        5.2.1 有等待状态的数据传输52-55
        5.2.2 传输终止方式55-56
        5.2.3 传输单个数据所用最少时钟数56-58
        5.2.4 读写数据传输的重叠58-59
    5.3 基于CORECONNECT 的新的总线构架59-63
        5.3.1 数据传输控制信号的简化59-60
        5.3.2 数据传输控制信号的增加60-63
6 总结与展望63-64
参考文献64-66
攻读硕士学位期间发表的学术论文66-67


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